1. Field of the Invention
The present invention relates to data processing systems and, in particular, to a data processing system including a PCI bus. Still more particularly, the present invention relates to a method and system in a data processing system for simulating a hardware fault utilizing a PCI bus.
2. Description of the Related Art
Computer architectures generally include a plurality of devices interconnected by one or more various buses. One such bus is a peripheral component interconnect (PCI) local bus. One or more PCI-compliant cards may be installed in a data processing system to expand the system's capabilities.
Known systems exist for detecting existing hardware faults in a computer system. Some systems provide means for detecting and isolating existing hardware faults on PCI cards.
For example, U.S. Pat. No. 5,602,989 describes a means for detecting a hardware fault on a bus by driving signals at one end of the bus, and verifying that the values at the other end match. The means detects existing faults, thus providing verification that a particular bus is either good or bad.
Another example is U.S. Pat. No. 4,459,693 which describes isolating an existing hardware fault after it has been detected. It includes special imbedded circuitry and software to enable and disable devices connected to the same node. In this manner, a faulty component can be isolated and identified.
These known fault detection systems, however, can themselves fail. Because it is not always readily apparent that the fault detection system has failed, faulty components and systems may pass the fault detection tests. When the fault detection system itself fails, testing of components and systems will not be accurate.
Therefore a need exists for a method and system in a data processing system for simulating hardware faults in order to determine whether a fault detection system is operating properly.